Regular Expressions 101

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An explanation of your regex will be automatically generated as you type.
Detailed match information will be displayed here automatically.
  • All Tokens
  • Common Tokens
  • General Tokens
  • Anchors
  • Meta Sequences
  • Quantifiers
  • Group Constructs
  • Character Classes
  • Flags/Modifiers
  • Substitution
  • A single character of: a, b or c
    [abc]
  • A character except: a, b or c
    [^abc]
  • A character in the range: a-z
    [a-z]
  • A character not in the range: a-z
    [^a-z]
  • A character in the range: a-z or A-Z
    [a-zA-Z]
  • Any single character
    .
  • Alternate - match either a or b
    a|b
  • Any whitespace character
    \s
  • Any non-whitespace character
    \S
  • Any digit
    \d
  • Any non-digit
    \D
  • Any word character
    \w
  • Any non-word character
    \W
  • Non-capturing group
    (?:...)
  • Capturing group
    (...)
  • Zero or one of a
    a?
  • Zero or more of a
    a*
  • One or more of a
    a+
  • Exactly 3 of a
    a{3}
  • 3 or more of a
    a{3,}
  • Between 3 and 6 of a
    a{3,6}
  • Start of string
    ^
  • End of string
    $
  • A word boundary
    \b
  • Non-word boundary
    \B

Regular Expression
No Match

r"
"
g

Test String

Code Generator

Language

Generated Code

#include <StringConstants.au3> ; to declare the Constants of StringRegExp #include <Array.au3> ; UDF needed for _ArrayDisplay and _ArrayConcatenate Local $sRegex = "(?<!#)(?:(?<=_FILE).+"(.+)")" Local $sString = "# ---------------------------------------------------------------------------- #" & @CRLF & _ "# Packages" & @CRLF & _ "# ---------------------------------------------------------------------------- #" & @CRLF & _ "" & @CRLF & _ "set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "file_1_test_1_qip.vhd"]" & @CRLF & _ "set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "file_2_test_1_qip.vhd"]" & @CRLF & _ "set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "file_3_test_1_qip.vhd"]" & @CRLF & _ "" & @CRLF & _ "# Register Tool set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "file_INVALID_test_1_qip.vhd"]" & @CRLF & _ "" & @CRLF & _ "# ---------------------------------------------------------------------------- #" & @CRLF & _ "# Sub Modules" & @CRLF & _ "# ---------------------------------------------------------------------------- #" & @CRLF & _ "" & @CRLF & _ "set_global_assignment -name QIP_FILE [file join $::quartus(qip_path) "module_test_2.qip"]" & @CRLF & _ "set_global_assignment -name QIP_FILE [file join $::quartus(qip_path) "module_test_3.qip"]" & @CRLF & _ "" & @CRLF & _ "# ---------------------------------------------------------------------------- #" & @CRLF & _ "# Module Files" & @CRLF & _ "# ---------------------------------------------------------------------------- #" & @CRLF & _ "" & @CRLF & _ "set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "file_4_test_1_qip.vhd"]" & @CRLF & _ "set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "file_5_test_1_qip.vhd"]" Local $aArray = StringRegExp($sString, $sRegex, $STR_REGEXPARRAYGLOBALFULLMATCH) Local $aFullArray[0] For $i = 0 To UBound($aArray) -1 _ArrayConcatenate($aFullArray, $aArray[$i]) Next $aArray = $aFullArray ; Present the entire match result _ArrayDisplay($aArray, "Result")

Please keep in mind that these code samples are automatically generated and are not guaranteed to work. If you find any syntax errors, feel free to submit a bug report. For a full regex reference for AutoIt, please visit: https://www.autoitscript.com/autoit3/docs/functions/StringRegExp.htm